* RTC demo program
*    The NF300 evaluation board features a Dallas DS1305 real time clock (RTC) 
*    which is connected with the CPU via the QSPI interface. 
*
*    The DS1305 chip select is ACTIVE HIGH. It is activated by PCS[3:0] 
*    equal to 1001. This is possible because a GAL16V8 is used to allow
*    arbitrary binary encodings of the raw PCS signals. The DS1305 has two
*    interrupts outputs, INT0 is connected to Port/Pin F2 and INT1 is 
*    connected to Port/Pin F3. 
*
*    Demo usage: Load this program into BD32 and set a breakpoint on
*    address 'md01'. Run the program in trace mode (stay on the return key)
*    and observe how the seconds displayed in register d5 count up. 
*
*    For more information consult the following documents:
*       - Dallas DS1305 datasheet (http://www.dalsemi.com)
*       - Motorola QSM Reference Manual (qsmbk.pdf)
*       - Motorola MC68332 User's Manual (332umbk.pdf)

* $Id: rtchh.asm,v 1.1 2002/11/03 12:06:23 hhoegl Exp hhoegl $

* Addressmap
RAM	EQU	$0		;RAM section
STACK	EQU	RAM+$800	;Stack section
PGM	EQU	RAM+$C00	;Program start
ROM	EQU	$800000		;ROM section
STACKSZ EQU	1024		;Max stack size

* Definitions
*
* 68332 global register definitions
*
* SIM
SIMCR   EQU     $FFFA00         ;SIM Configuration Register
SYPCR   EQU     $FFFA20         ;System Protection Register
CSBARBT EQU     $FFFA48         ;Chip Select Base Address Boot Register
CSBAR0  EQU     $FFFA4C         ;Chip Select Base Address Register 0

CSBAR3	EQU	$FFFA58		;RTC connected to CS3
CSOR3	EQU	$FFFA60

CSBAR5	EQU	$FFFA60		;LCD connected to CS5
CSOR5	EQU	$FFFA62

CSPAR0	EQU	$FFFA44		;Chip Select Pin Assignment

*PORT E
PEPAR	EQU     $FFFA16        	;Pin Assignment Register
DDRE	EQU     $FFFA14        	;Data Direction Register
PORTE	EQU     $FFFA12        	;Port E is decoded on 2

*PORT F
PFPAR	EQU     $FFFA1E        	;Pin Assignment Register
DDRF	EQU     $FFFA1C        	;Data Direction Register
PORTF	EQU     $FFFA1A        	;Port F is decoded on 2  

*LCD
LCD_IR	EQU	$200000		;LCD Instruction Register
LCD_DR	EQU	$200001		;LCD Data Register

*QSM
QSMCR   EQU     $FFFC00
QTEST   EQU     $FFFC02
QILR    EQU     $FFFC04
QIVR    EQU     $FFFC05
PORTQS  EQU     $FFFC15
PQSPAR  EQU     $FFFC16
DDRQS   EQU     $FFFC17
SPCR0   EQU     $FFFC18
SPCR1   EQU     $FFFC1A
SPCR2   EQU     $FFFC1C
SPCR3   EQU     $FFFC1E         
SPSR    EQU     $FFFC1F
SPRR    EQU     $FFFD00 	;Receive RAM
SPTR    EQU     $FFFD20         ;Transmit RAM
SPCR    EQU     $FFFD40         ;Commmand RAM

* Place FEPROM at $800000, because unused
	org 	CSBARBT		;set on CSBARBT
	dc.w	$8003		;at 8M, size 64KB

* Place ext. RAM at $0, 256KB, 0WS
	org     CSBAR0		;Set on SIM CSs
	dc.w	$0005		;CSBAR0, ext. RAM_RD
	dc.w	$6830		;CSOR0	
	dc.w	$0005		;CSBAR1, ext. RAM_WR_LO
	dc.w	$3030		;CSOR1		
	dc.w	$0005		;CSBAR2, ext. RAM_WR_HI
	dc.w	$5030		;CSOR2

* Initialize SIM and system protection

* Switch off watchdogs, also while FREEZE is active
	org	SIMCR
	dc.w	$60CF		;FREEZE settings

	org	SYPCR
	dc.w	$0000		;no system protection

* Define Stack 
	org     STACK		;Stack from STACK to STACK + STACKSZ
sseg	ds.b    STACKSZ		

* ________________________ main program _____________________________
cseg	org     PGM         	;Programcode at $C00

** 
* Main program
main

* Initialize stack pointer
	move.l	#sseg+STACKSZ,a7 ;load stack pointer

* Initial Program Counter is initialized by the corresponding 
* DO-File

* Initialize Port E
	move.w	#$0000,PEPAR	;I/O instead of systembus
	move.w 	#$000F,DDRE	;4 bit as output

* Initialize Port F
	move.w	#$0000,PFPAR	;I/O instead of systembus
	move.w 	#$0000,DDRF	;all 8 bit as input

* CS5 (LCD) and CS3 (RTC) enable
	or.w	#$2200,CSPAR0

* Init LCD Chipselect
	move.w	#$2000,CSBAR5	;Basisadresse LCD, 2K Block
	move.w	#$7D30,CSOR5	;CS Options

* QSM Init
	move.w  #$0000,QSMCR

        bsr     main_demo_rtc
        bsr     forever

*** End of main program

**
* Init QSPI. CLK Speed is given by system_clk / (2 * SPBR)
* LOOPQ : Bit 10 in SPCR3
qspi_init
	move.w  #%0000001100000011,SPCR1  ;disable QSPI pins
 	move.b  #$00,PORTQS     ;PCS3=0 and all else 0
	move.b  #$7e,DDRQS      ;1=out, 0=in
	move.b  #$7f,PQSPAR     ;SPI Outputs

	move.w  #%1000000111111111,SPCR0  ;Master, 16-bits, CPHA=1, SPBR
        move.w  #%0000000000000000,SPCR2  ;No Interrupts, ENDQP=0
        move.w  #%0000000000000000,SPCR3  
	rts

**
* Write a byte to an 8-bit address
* d0 -- data
* d1 -- address
qspi_wr_byte
	move.b	d1,SPTR
	move.b  d0,SPTR+1
 	move.b  #$49,SPCR 	;Control RAM: BITSE, PCS3
 	bsr	_qspi_enable	;start transmission
	bsr     _qspi_wuf	;wait until tx finished
	rts

**
* Dummy write to the SPI bus. Use this function as a delay between
* multiple write accesses to the RTC device.  It sends 8 zero bits on the 
* SPI bus without activating any chip select signals.
qspi_wr_delay
	move.b	#0,SPTR
	move.b  #0,SPTR+1
 	move.b  #$00,SPCR 	;Control RAM: 8 bit, No CS
 	bsr	_qspi_enable	;start transmission
	bsr     _qspi_wuf	;wait until tx finished
	rts

**
* Read a byte from a given address and return it in d0.
* d1 -- address
qspi_rd_byte
	move.b	d1,SPTR
	move.b  #0,SPTR+1
 	move.b  #$c9,SPCR 	;Control RAM: BITSE, PCS3
 	bsr	_qspi_enable	;start transmission
	bsr     _qspi_wuf	;wait until tx finished
	move.w  SPRR,d2
	rts

**
* Start QSPI transmission
_qspi_enable
        ori.w   #$8000,SPCR1  ;Enable QSPI
	rts

**
* Wait until finished (Wait until the SPIF bit becomes one)
_qspi_wuf
	move.b	SPSR,d0
	andi.b  #$80,d0
	cmp.b   #$80,d0
	bne     _qspi_wuf    
        bclr  #7,SPSR  ;Clear SPIF bit
	rts

**
* Enter infinite loop
forever
_fe01   bra	_fe01
	rts

**** main_RTC *****

main_demo_rtc
	bsr	qspi_init

* Initialize the RTC by writing to it's status register
_md01
 	move.b  #$8f,d1		;write address status register
 	move.b  #$00,d0		;data
 	bsr     qspi_wr_byte
	bsr	qspi_wr_delay	;wait

* write time and date to RTC
_write
 	move.b  #$80,d1		;write address seconds
 	move.b  #$00,d0		;data (00 sec)
 	bsr     qspi_wr_byte
	bsr	qspi_wr_delay	;wait

 	move.b  #$81,d1		;write address minutes
 	move.b  #$00,d0		;data (00 min)
 	bsr     qspi_wr_byte
	bsr	qspi_wr_delay	;wait

 	move.b  #$82,d1		;write address hours
 	move.b  #$15,d0		;data (15 h)
 	bsr     qspi_wr_byte
	bsr	qspi_wr_delay	;wait	

 	move.b  #$83,d1		;write address day
 	move.b  #$04,d0		;data (Th)
 	bsr     qspi_wr_byte
	bsr	qspi_wr_delay	;wait	

 	move.b  #$84,d1		;write address date
 	move.b  #$07,d0		;data (7)
 	bsr     qspi_wr_byte
	bsr	qspi_wr_delay	;wait

 	move.b  #$85,d1		;write address month
 	move.b  #$11,d0		;data (11)
 	bsr     qspi_wr_byte
	bsr	qspi_wr_delay	;wait

 	move.b  #$86,d1		;write address year
 	move.b  #$02,d0		;data (02)
 	bsr     qspi_wr_byte
	bsr	qspi_wr_delay	;wait

* Read from the RTC registers in an endless loop
_w02
	bsr	lcd_init

        move.b  #$06,d1		;read address year
	bsr     qspi_rd_byte
	bsr	_calc		;create ASCII-code and write to LCD display

*	move.b	#'-',d5
*	bsr	lcd_char	;write '-' to LCD display

        move.b  #$05,d1		;read address month
	bsr     qspi_rd_byte
	bsr	_calc		;create ASCII-code and write to LCD display

*	move.b	#'-',d5
*	bsr	lcd_char	;write '-' to LCD display

        move.b  #$04,d1		;read address date
	bsr     qspi_rd_byte
	bsr	_calc		;create ASCII-code and write to LCD display

	move.b	#'T',d5
	bsr	lcd_char	;write 'T' to LCD display

        move.b  #$02,d1		;read address hour
	bsr     qspi_rd_byte
	bsr	_calc		;create ASCII-code and write to LCD display

	move.b	#':',d5
	bsr	lcd_char	;write ':' to LCD display

        move.b  #$01,d1		;read address minutes
	bsr     qspi_rd_byte
	bsr	_calc		;create ASCII-code and write to LCD display

*	move.b	#' ',d5
*	bsr	lcd_char	;write ' ' to LCD display

	move.b	#':',d5
	bsr	lcd_char	;write ':' to LCD display

        move.b  #$00,d1		;read address seconds
 	bsr     qspi_rd_byte
	bsr	_calc		;create ASCII-code and write to LCD display

	bsr	wait		;waiting
	bsr	wait		;waiting
	bsr	wait		;waiting

        bra     _w02

	rts

* calculate and create ASCII-Code and write to LCD display
_calc	
	move.b  d2,d5		;store D2 in D5
	and.b	#$F0,d5
	lsr.b	#$4,d5		;rotate upper nibble to lower nibble
	add.b	#$30,d5		;create ASCII-code	
	bsr	lcd_char	;write data to LCD display

	move.b  d2,d5		;store D2 in D5
	and.b	#$0F,d5
	add.b	#$30,d5		;create ASCII-code	
	bsr	lcd_char	;write data to LCD display

	rts

* Initialize the LCD display
lcd_init
	move.b	#$38,LCD_IR     ; DL=1 (8-Bit), N=1, F=0
	bsr	lcd_busy
	move.b	#$0f,LCD_IR	; 1 D C B (Display, Cursor, Blink)
	bsr	lcd_busy
	move.b	#$01,LCD_IR	; Clear Display, Cursor Home
	bsr	lcd_busy
	move.b	#$06,LCD_IR	; 1 I/D S 
	bsr	lcd_busy     
	rts

* Write a data character to the LCD display
lcd_char	
        move.b	D5,LCD_DR
	bsr	lcd_busy
	rts

* Wait until LCD display is ready for another read/write cycle
lcd_busy	
        btst	#7,LCD_IR       ; Bit 7 ist 1 falls LCD Busy
	bne.b	lcd_busy	; Z-Bit ist invertiertes Bit-7
	rts

* Move cursor one position to the right
cu_right  
        move.b  #$14,LCD_IR
        bsr     lcd_busy
        rts


* Delay loop *
wait
	move.w	d7,-(a7)			
	move.w	#$FFFF,d7	; number of wait loops
_w01	dbra	d7,_w01
	move.w	(a7)+,d7
	rts                   

	end