************************************************************************** * * * Project: Periodic Interrupt Timer * * Filename: PIT.asm * * * ************************************************************************** * Description:************************************************************ * * Periodischer Interrupt, der durch Ausgaben an PortE am Oszi sichtbar ist * ************************************************************************** * Addressmap with EQUates:************************************************ * RAM EQU $0 ;RAM section STACK EQU RAM+$800 ;Stack section PGM EQU RAM+$C00 ;Program start ROM EQU $800000 ;ROM section * *************************************************************************** * Definitions:************************************************************ * *** 68332 global registerdefinitions *** * * SIM SIMCR EQU $FFFA00 ;SIM Configuration Register SYPCR EQU $FFFA20 ;System Protection Register CSBARBT EQU $FFFA48 ;Chip Select Base Address Boot Register CSBAR0 EQU $FFFA4C ;Chip Select Base Address Register 0 *PORT E PEPAR EQU $FFFA16 ;Pin Assignment Register DDRE EQU $FFFA14 ;Data Direction Register PORTE EQU $FFFA12 ;Port E is decoded on 2 *PORT F PFPAR EQU $FFFA1E ;Pin Assignment Register DDRF EQU $FFFA1C ;Data Direction Register PORTF EQU $FFFA1A ;Port F is decoded on 2 *PIT PICR EQU $FFFA22 ;PIT Control Register PITR EQU $FFFA24 ;PIT Timer Register * * Globals SL EQU 1024 ;Stack length * ************************************************************************** *** Init Presets ********************************************************* * *** Place FEPROM at $800000, because unused * ORG CSBARBT ;set on CSBARBT DC.W $8003 ;at 8M, size 64KB * *** Place ext. RAM at $0, 256KB, 0WS *** * ORG CSBAR0 ;Set on SIM CSs DC.W $0005 ;CSBAR0, ext. RAM_RD DC.W $6830 ;CSOR0 DC.W $0005 ;CSBAR1, ext. RAM_WR_LO DC.W $3030 ;CSOR1 DC.W $0005 ;CSBAR2, ext. RAM_WR_HI DC.W $5030 ;CSOR2 * *** Initialize SIM and system protection * Switch off watchdogs, also while FREEZE is active * ORG SIMCR DC.W $60CF ;FREEZE settings ORG SYPCR DC.W $0000 ;no system protection * *** Define Stack *** * ORG STACK ;Stackarea starts at $800 ST DS.B SL ;Length is 1KByte * ************************************************************************** * Program: *************************************************************** * *** Used processor-registers: * D0: LED-on-register * D1: LED-off-register * D2: wait time * *** Start in SRAM *** ORG PGM ;Programcode at $C00 * *** Initialize registers *** * * Initialize stack pointer BLINK MOVE.L #ST+SL,A7 ;load Stack Pointer * Initial Program Counter is initialized by the corresponding DO-File * * Initialize Port E MOVE.W #$0000,PEPAR ;I/O instead of systembus MOVE.W #$000F,DDRE ;4 bit as output * * Initialize Port F MOVE.W #$0000,PFPAR ;I/O instead of systembus MOVE.W #$0000,DDRF ;all 8 bit as input * * Initialize CPU32 registers MOVE.W #$FFFF,D0 ;initialize with LED = on MOVE.W #$FFFF,D1 ;initialize with LED = off * Belegen der Vektortabelle MOVE.L #ISR,$100 * Initialisiere PIT mit 20ms move.w #$0640,PICR ;IPL = 6 / number = $40 move.w #$00AF,PITR ;prescaler=512,time=125ms * Initialisiere Interruptmaske andi.w #%1111100011111111,SR ;irq maske setzen ori.w #%0000010100000000,SR ; *** main ** * MOVE.W #$FFFE,PORTE START eori.w #%00000001,PORTE * BSR WAIT ;enjoy it BRA START ;do forever * *** Subroutine *** * WAIT MOVE.W #$05,D3 ;Zaehler aussen LOOP2 MOVE.W #$8000,D2 ;Zaehler innen LOOP1 DBRA D2,LOOP1 DBRA D3,LOOP2 RTS ;return ************************************************************************** *ISR ISR movem.l D0-D7,-(A7) ;Retten der Datenregister eori.w #%000010,PORTE ;toggle output E(2) addq.b #1,D5 ;testzaehler movem.l (A7)+,D0-D7 ;Zurückschreiben der Register rte ************************************************************************** * *** For the Assembler... *** END BLINK * **************************************************************************